SH7265 Datasheet, PDF (1603/2024 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 29 AESOP
29.4.3 AESOP Activation
When the AESOP is activated, a software reset should be set to initialize register state. Then, the
software reset should be cleared and ACC encoding processing should be set. Figure 29.5 shows
the AESOP activation flowchart.
AESOP activation
Set SWRSR to H'00000000 (set software reset).
Set SWRSR to H'00000001 (clear software reset).
End
Figure 29.5 AESOP Activation Flowchart
29.4.4 AESOP Halting
When the AESOP is halted, it should be reset. Figure 29.6 shows the AESOP halting flowchart.
AESOP halting
Set SWRSR to H'00000000 (set software reset).
End
Figure 29.6 AESOP Halting Flowchart
Rev. 1.00 Mar. 14, 2008 Page 1567 of 1984
REJ09B0351-0100