SH7265 Datasheet, PDF (17/2024 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

12.3.12 Timer Counter (TCNT)..................................................................................... 508
12.3.13 Timer General Register (TGR) ......................................................................... 508
12.3.14 Timer Start Register (TSTR) ............................................................................ 509
12.3.15 Timer Synchronous Register (TSYR)............................................................... 510
12.3.16 Timer Read/Write Enable Register (TRWER) ................................................. 512
12.3.17 Timer Output Master Enable Register (TOER) ................................................ 513
12.3.18 Timer Output Control Register 1 (TOCR1) ...................................................... 514
12.3.19 Timer Output Control Register 2 (TOCR2) ...................................................... 517
12.3.20 Timer Output Level Buffer Register (TOLBR) ................................................ 520
12.3.21 Timer Gate Control Register (TGCR) .............................................................. 521
12.3.22 Timer Subcounter (TCNTS) ............................................................................. 523
12.3.23 Timer Dead Time Data Register (TDDR)......................................................... 524
12.3.24 Timer Cycle Data Register (TCDR) ................................................................. 524
12.3.25 Timer Cycle Buffer Register (TCBR)............................................................... 525
12.3.26 Timer Interrupt Skipping Set Register (TITCR) ............................................... 525
12.3.27 Timer Interrupt Skipping Counter (TITCNT)................................................... 527
12.3.28 Timer Buffer Transfer Set Register (TBTER) .................................................. 528
12.3.29 Timer Dead Time Enable Register (TDER)...................................................... 530
12.3.30 Timer Waveform Control Register (TWCR) .................................................... 531
12.3.31 Bus Master Interface ......................................................................................... 532
12.4 Operation .......................................................................................................................... 533
12.4.1 Basic Functions................................................................................................. 533
12.4.2 Synchronous Operation..................................................................................... 539
12.4.3 Buffer Operation ............................................................................................... 541
12.4.4 Cascaded Operation .......................................................................................... 545
12.4.5 PWM Modes ..................................................................................................... 550
12.4.6 Phase Counting Mode ....................................................................................... 555
12.4.7 Reset-Synchronized PWM Mode...................................................................... 562
12.4.8 Complementary PWM Mode............................................................................ 565
12.4.9 A/D Converter Start Request Delaying Function.............................................. 605
12.4.10 TCNT Capture at Crest and/or Trough in Complementary
PWM Operation ................................................................................................ 609
12.5 Interrupt Sources............................................................................................................... 610
12.5.1 Interrupt Sources and Priorities......................................................................... 610
12.5.2 DMAC Activation............................................................................................. 612
12.5.3 A/D Converter Activation................................................................................. 612
12.6 Operation Timing.............................................................................................................. 614
12.6.1 Input/Output Timing ......................................................................................... 614
12.6.2 Interrupt Signal Timing..................................................................................... 621
12.7 Usage Notes ...................................................................................................................... 625
Rev. 1.00 Mar. 14, 2008 Page xvii of xxxvi