SH7265 Datasheet, PDF (1960/2024 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 36 Electrical Characteristics
36.4.16 ATAPI Timing
Table 36.24 Timing of Register Access by PIO Transfer by ATAPI Interface
Conditions: PVCC = 3.3 ± 0.3 V, Ta = −40 to 85 °C, PVSS = 0 V
Mode 0 Mode 1 Mode 2 Mode 3 Mode 4
Item
Symbol Conditions ns
ns
ns
ns
ns
Figure
Cycle time
Address setup time
t₀
Min.
600 383 330 180 120 Figure
t₁
Min.
70
50
30
30
25
36.60
IDEIORD#/IDEIOWR# pulse t₂
Min.
290 290 290 80
70
width (8 bits)
IDEIORD#/IDEIOWR# recovery t_2i
Min.
time



70
25
IDEIOWR# data setup time
t₃
IDEIOWR# data hold time
t₄
IDEIORD# data setup time
t₅
IDEIORD# data hold time
t₆
IDEIORD# 3-state delay time t_6Z
Address hold time
t₉
IDEIORDY read data valid time t_RD
Response time from rise of
t_RR
IDEIORDY to rise of IDEIORD#
Min.
Min.
Min.
Min.
Max.
Min.
Min.
Min.
Max.
60
45
30
30
20
30
20
15
10
10
50
35
20
20
20
5
5
5
5
5
30
30
30
30
30
20
15
10
10
10
0
0
0
0
0
30
30
30
30
30
90
90
90
90
90
IDEIORDY setup time
t_A
IDEIORDY pulse time
t_B
Time from IDEIORDY negation t_C
to Hi-Z
Min.
Max.
Max.
35
1250
5
35
1250
5
35
1250
5
35
1250
5
35
1250
5
Rev. 1.00 Mar. 14, 2008 Page 1924 of 1984
REJ09B0351-0100