SH7265 Datasheet, PDF (1584/2024 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 29 AESOP
Register Name
Abbreviation R/W
Reserved


Setting-predetermined register 10
SDTRR
R/W
Stream data forcible transfer register SDFOR
R/W
Forcibly-transferred stream data byte SDBTR
R
amount indicating register
Reserved


Frame byte amount indicating register FBYTR
R
Reserved


Reserved


Initial Value Address
Access
Size

H'FFA10058 32
H'00000000 H'FFA1005C 32
H'00000000 H'FFA10060 32
H'00000000 H'FFA10064 32

H'FFA10068 32
H'00000000 H'FFA1006C 32

H'FFA10070 32

H'FFA10074 32
Rev. 1.00 Mar. 14, 2008 Page 1548 of 1984
REJ09B0351-0100