SH7265 Datasheet, PDF (1988/2024 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 36 Electrical Characteristics
Table 36.31 2DG Display Output Timing
Conditions: VCC = PLLVCC = 1.1 to 1.3 V, USBDVCC = 1.1 to 1.3 V, USBAVCC = 1.1 to 1.3 V,
PVCC = 3.0 to 3.6 V, AVCC = 3.0 to 3.6 V, USBAPVCC = 3.0 to 3.6 V,
2DGAPVCC0 = 3.0 to 3.6 V, 2DGAPVCC1 = 3.0 to 3.6 V,
VSS = PLLVSS = USBAVSS = AVSS = USBAPVSS = 2DGAPVSS0 = 2DGAPVSS1 = 0 V,
Ta = −40 to 85 °C
Item
DCLKIN clock input cycle time
DCLKIN clock input low-level pulse width
DCLKIN clock input high-level pulse width
DCLKIN clock input rise time
DCLKIN clock input fall time
Output data delay time
Symbol Min.
tDCKcyc
83
tDCKL
34
tDCKH
34
tDCKr

tDCKf

tDD
0
Max. Unit
200 ns

ns

ns
3
ns
3
ns
15
ns
Figure
Figure
36.85
Figure
36.86
DCLKIN
t_DCKcyc
t_DCKH
t_DCKL
V_IH
V_IH
1/2 PVcc
V_IL
V_IL
t_DCKf
V_IH
1/2 PVcc
t_DCKr
Figure 36.85 DCLKIN Clock Input Timing
DCLKIN
t_DD
t_DD
CSYNC
Figure 36.86 Display Output Timing
Rev. 1.00 Mar. 14, 2008 Page 1952 of 1984
REJ09B0351-0100