SH7265 Datasheet, PDF (1470/2024 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 28 2D Graphics Engine (2DG)
Initial
Bit
Bit name Value
R/W Description
5, 4
LGTYPE
00
R/W Logical Operation Type Select
These bits select the type of logical operation.
00: Setting prohibited
01: XORs SB data and GR_LGDAT register.
10: ORs SB data and GR_LGDAT regsister.
11: Inverts the result obtained by XORing SB data
and GR_LGDAT register.
3, 2
SBSEL
00
R/W SB Output Data Select
These bits select data output from SB after various
processings.
00: SB data
01: Data after chromakey processing
10: Data after logical operation
11: Data after color gradation processing
1, 0
BTYPE
00
R/W Blitting Mode
These bits set the blitting modes.
00: Blit operation (Data is input to SA or SB and
output to DC.)
01: Setting prohibited
10: Filling operation (The blending is performed using
data input to SB and register values. The result is
output to DC.)
11: Setting prohibited
• The CRKEY bits are valid only when the SBSEL bits are set to 01 and the BTYPE bits are set
to 10.
• When the chromakey is enabled (when the SBSEL bits are set to 01 and the BTYPE bits are
set to 10), operation is the same as when the GCOLR bit in GR_BRD1CNT is set to 1.
However, the value of the GCOLR bit does not change.
• The LGTYPE bit is valid only when the SBSEL bits are set to 10.
• The SBSEL bits can be set to 00, 01, or 10 when the filling operation is selected (BTYPE =
10), and they can be set to 00, 10, or 11 when the blitting operation is selected (BTYPE = 00).
• If the BTYPE bits are set to 00, setting chromakey is prohibited.
Rev. 1.00 Mar. 14, 2008 Page 1434 of 1984
REJ09B0351-0100