SH7265 Datasheet, PDF (1604/2024 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 29 AESOP
29.4.5 Initial Value Settings for Encoding
ACC encoding processing conditions at the AESOP activation should be set in the initial value
settings for encoding. Figure 29.7 shows a flowchart of the initial value settings for encoding.
Initial value settings for encoding
Set SFB_RAM (set default for the scale factor).
Set the setting-predetermined register 3.
Set ADIFR (set data processing information).
Set the setting-predetermined register 4.
Set HEADR (select the header is used or not).
Set ADTSR (set ADTS header information).
Set the setting-predetermined register 5.
Set the setting-predetermined register 6.
Set the setting-predetermined register 7.
Set the setting-predetermined register 8.
Set the setting-predetermined register 9.
End
Figure 29.7 Encoding Processing Setting Flowchart
Rev. 1.00 Mar. 14, 2008 Page 1568 of 1984
REJ09B0351-0100