SH7265 Datasheet, PDF (1557/2024 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 28 2D Graphics Engine (2DG)
Starting address
Pixel dara
Row 0 Column 0
Row 0 Column 1
Horizontal width
(1 line)
Row 0 Column 2
•
•
•
•
•
•
•
•
•
Row 0 Column 98
Row 0 Column 99
1 pixel
2 pixels
3 pixels
99 pixels
100 pixels
Starting address + line pitch
× the number of lines
Row 1 Column 0
Row 1 Column 1
Horizontal width
(2 lines)
Row 1 Column 2
•
•
•
•
•
•
•
•
•
Row 1 Column 98
Row 1 Column 99
101 pixels
102 pixels
103 pixels
199 pixels
200 pixels
Starting address + line pitch
× the number of lines
Row 2 Column 0
Row 2 Column 1
Horizontal width
(3 lines)
Row 2 Column 2
•
•
•
•
•
•
•
•
•
Row 2 Column 98
Row 2 Column 99
201 pixels
202 pixels
203 pixels
299 pixels
300 pixels
Starting address + line pitch
× the number of lines
Figure 28.44 Allocation of images within memory space
Rev. 1.00 Mar. 14, 2008 Page 1521 of 1984
REJ09B0351-0100