SH7265 Datasheet, PDF (1619/2024 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 30 Pin Function Controller (PFC)
Table 30.8 Multiplexed Pins (Port H)
0000
Setting Function 1
Register (General I/O)
PHCRL4 PH15 I/O (port)
PH14 I/O (port)
PH13 I/O (port)
PH12 I/O (port)
PHCRL3 PH11 I/O (port)
PH10 I/O (port)
PH9 I/O (port)
PH8 I/O (port)
PHCRL2 PH7 I/O (port)
PH6 I/O (port)
PH5 I/O (port)
PH4 I/O (port)
PHCRL1 PH3 I/O (port)
PH2 I/O (port)
PH1 I/O (port)
PH0 I/O (port)
Setting of Mode Bits (PHnMD[3:0])
0001
0010
0011
Function 2
(Related Module)
Function 3
(Related Module)
Function 4
(Related Module)
AUDIO_CLK input 

(SSIF)
SSIDATA4 I/O (SSIF) SCK5 I/O (SCIF)
SD_D2 I/O (SDHI)
SSIWS4 I/O (SSIF) TxD5 output (SCIF) SD_D1 I/O (SDHI)
SSISCK4 I/O (SSIF) RxD5 input (SCIF) SD_D0 I/O (SDHI)
SSIDATA3 I/O (SSIF) 

SSIWS3 I/O (SSIF) 

SSISCK3 I/O (SSIF) 

SSIDATA2 I/O (SSIF) 

SSIWS2 I/O (SSIF) 

SSISCK2 I/O (SSIF) 

SSIDATA1 I/O (SSIF) TEND2 output

(DMAC)
SSIWS1 I/O (SSIF) DACK2 output
(DMAC)
DACT2 output
(DMAC)
SSISCK1 I/O (SSIF) DREQ2 input

(DMAC)
SSIDATA0 I/O (SSIF) 

SSIWS0 I/O (SSIF) 

SSISCK0 I/O (SSIF) 

0100
Function 5
(Related Module)

NAF5 I/O (FLCTL)
NAF4 I/O (FLCTL)
NAF3 I/O (FLCTL)
NAF2 I/O (FLCTL)
NAF1 I/O (FLCTL)
NAF0 I/O (FLCTL)









Rev. 1.00 Mar. 14, 2008 Page 1583 of 1984
REJ09B0351-0100