SH7265 Datasheet, PDF (1441/2024 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 28 2D Graphics Engine (2DG)
28.3.1 Blit Function Setting Register for Graphics (GR_BLTPLY)
Register GR_BLTPLY is used to enable blitting.
Bit: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Initial value: -
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
R/W: R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
-
-
-
-
-
-
-
-
-
-
-
-
-
-
SB_
STEN
SA_
STEN
Initial value: -
-
-
-
-
-
-
-
-
-
-
-
-
-
0
0
R/W: R
R
R
R
R
R
R
R
R
R
R
R
R
R R/W R/W
Bit
Bit name
31 to 2 
1
SB_STEN
0
SA_STEN
Initial
Value
R/W
Undefined R
0
R/W
0
R/W
Description
Reserved
The read value is undefined. The write value should
always be 0.
Enable Blitting from Source B.
This bit enables blitting from source B or makes
source B blitting wait.
0: Waiting mode
1: Execution is enabled or in progress. On
completion of the blit operation, the hardware
automatically clears the bit to 0.
Enable Blitting from Source A
This bit enables blitting from source A or makes
source A blotting wait
0: Waiting mode
1: Execution is enabled or in progress. On
completion of the blit operation, the hardware
automatically clears the bit to 0.
Rev. 1.00 Mar. 14, 2008 Page 1405 of 1984
REJ09B0351-0100