SH7265 Datasheet, PDF (402/2024 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 11 Direct Memory Access Controller (DMAC)
11.2 Input/Output Pins
Table 11.1 shows DMAC pin functions.
Table 11.1 Pin Configuration
Pin Name
DREQ0 to DREQ3
DACK0 to DACK3
I/O
Input
Output
DACT0 to DACT3
Output
TEND0 to TEND3
Output
Function
External request for DMA transfer
DMA acknowledgment output signal (active low) for
external request of DMA transfer
These signals are output when an external request of DMA
transfer is accepted.
DMA active output signal (active low) for external request
of DMA transfer
These signals are output during a normal DMA space
access.
DMA end output signal (low at the end of DMA transfer) for
external request of DMA transfer
These signals are output during the last DMA access to
normal space in cycle-stealing mode.
Rev. 1.00 Mar. 14, 2008 Page 366 of 1984
REJ09B0351-0100