SH7265 Datasheet, PDF (1786/2024 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 35 List of Registers
Module
Name Register Name
Abbreviation
2DG
DMAC-request control register for GR_DMAC
graphics
Source A&B read-in-area setting GR_SABSET
register for blitter
Destination C write area setting
register for blitter
GR_DCSET
Source E read in-area setting
register for output block
(synchronized with VSYNC)
MGR_SESET
Pixel format setting register for GR_PIXLFMT
graphics (only one bit, SF_FMT, is
synchronized with VSYNC)
Operation mode setting register for GR_BLTMODE
blitter
Resize display setting register for GR_RISZSET
graphics
Resize mode select register for
blitter
GR_RISZMOD
Resize delta setting register for
blitter
GR_DELT
Resize horizontal starting phase
register for blitter
GR_HSPHAS
Resize vertical starting phase
register for blitter
GR_VSPHAS
Resize horizontal delta
setting register for output block
(synchronized with VSYNC)
MGR_HDELT
Resize horizontal starting phase
register for output block
(synchronized with VSYNC)
MGR_HPHAS
Logical operation input data
register for blitter
GR_LGDAT
Chromakey target color data
register for blitter
GR_DETCOL
Replacement color data register
for blitter blending
GR_BRDCOL
Blend 1 control register for blitter GR_BRD1CNT
Number
of Bits Address
32
H'E8000020
Access
Size
16, 32
32
H'E8000030 16, 32
32
H'E8000038 16, 32
32
H'E8000040 16, 32
32
H'E8000048 16, 32
32
H'E8000050 16, 32
32
H'E8000060 16, 32
32
H'E8000064 16, 32
32
H'E8000068 16, 32
32
H'E800006C 16, 32
32
H'E8000070 16, 32
32
H'E8000074 16, 32
32
H'E8000078 16, 32
32
H'E8000080 16, 32
32
H'E8000084 16, 32
32
H'E8000088 16, 32
32
H'E800008C 16, 32
Rev. 1.00 Mar. 14, 2008 Page 1750 of 1984
REJ09B0351-0100