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SH7265 Datasheet, PDF (1017/2024 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series | |||
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Section 20 Controller Area Network (RCAN-TL1)
Bit 15 to 0 â Notifies that the requested transmission of the corresponding Mailbox has been
finished successfully. The bit 15 to 0 corresponds to Mailbox-31 to 16 respectively.
Bit[15:0]:TXACK1 Description
0
[Clearing Condition] Writing â1â (Initial value)
1
Corresponding Mailbox has successfully transmitted message (Data or
Remote Frame)
[Setting Condition]
Completion of message transmission for corresponding mailbox
⢠TXACK0
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
TXACK0[15:1]
-
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* -
Note: * Only when writing a â1â to clear.
Bit 15 to 1 â Notifies that the requested transmission of the corresponding Mailbox has been
finished successfully. The bit 15 to 1 corresponds to Mailbox-15 to 1 respectively.
Bit[15:1]:TXACK0 Description
0
[Clearing Condition] Writing â1â (Initial value)
1
Corresponding Mailbox has successfully transmitted message (Data or
Remote Frame)
[Setting Condition]
Completion of message transmission for corresponding mailbox
Bit 0 â This bit is always â0â as this is a receive-only mailbox. Writing a â1â to this bit position
has no effect and always read back as a â0â.
Rev. 1.00 Mar. 14, 2008 Page 981 of 1984
REJ09B0351-0100
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