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SH7265 Datasheet, PDF (1388/2024 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series
Section 25 USB 2.0 Host/Function Module (USB)
(c) Changing the MBW Bits when the Direction for the Specified Pipe is Reception
When the direction for the specified pipe is reception, write to the MBW bits of the FIFO port
selection register (CFIFOSEL, D0FIFOSEL, and D1FIFOSEL) at the same time as the CURPIPE
setting is made. When the CFIFO register has the DCP setting (CURPIPE = 0), write to the MBW
bits at the same time as the settings for CURPIPE or ISEL are made.
The procedure for changing the setting of only the MBW bits for a given current pipe setting is
shown below. However, once processing to read from the buffer memory has started, do not
change the setting of the MBW bits until reading out of all data is complete.
• This is applicable other than when the CURPIPE bits for DFIFO0, DFIFO1, or CFIFO have the
DCP setting.
Start
[1]
Set the CURPIPE bits to 000
Read the CURPIPE bits to confirm
that the written value and the read
value are the same.
[2] Set bits MBW and CURPIPE
at the same time.
Read the CURPIPE bits to confirm
that the written value and the read
value are the same.
[1] Change the setting of the CURPIPE bits to select a different
CURPIPE.
[2] Set the MBW bits as desired, and set the CURPIPE bits to select
the same pipe as before label [1] above.
End of adjusting the MBW bits
Figure 25.12 Example of Adjusting the MBW Bits when the CURPIPE Bits of DFIFO0,
DFIFO1, or CFIFO Have a Setting Other than DCP (000)
Rev. 1.00 Mar. 14, 2008 Page 1352 of 1984
REJ09B0351-0100