SH7265 Datasheet, PDF (1325/2024 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Bit
Bit Name
1, 0
PID[1:0]
Section 25 USB 2.0 Host/Function Module (USB)
Initial
Value R/W
00
R/W
Description
Response PID
Controls the responses of this module during
control transfer.
These bits should be modified from NAK to BUF
when the data stage or status stage is executed in
control transfer.
[When the host controller function is selected]
Modify the setting of these bits from NAK to BUF
using the following procedure.
• When the transmitting direction is set
Write all the transmit data to the FIFO buffer
while UACT is 1 and PID is NAK, and then set
PID to BUF. After PID has been set to BUF, this
module executes the OUT transaction (or PING
transaction).
• When the receiving direction is set
Check that the FIFO buffer is empty (or empty
the buffer) while UACT is 1 and PID is NAK, and
then set PID to BUF. After PID has been set to
BUF, this module executes the IN transaction.
This module modifies the setting of these bits in the
following conditions.
• This module sets PID to STALL if it receives
data exceeding the maximum packet size when
PID is set to BUF.
• This module sets PID to NAK on detecting a
receive error such as a CRC error three
consecutive times.
• This module also sets PID to STALL on
receiving the STALL handshake.
Rev. 1.00 Mar. 14, 2008 Page 1289 of 1984
REJ09B0351-0100