SH7265 Datasheet, PDF (1992/2024 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 36 Electrical Characteristics
36.4.20 H-UDI Timing
Table 36.35 H-UDI Timing
Conditions: VCC = PLLVCC = 1.1 to 1.3 V, USBDVCC = 1.1 to 1.3 V, USBAVCC = 1.1 to 1.3 V,
PVCC = 3.0 to 3.6 V, AVCC = 3.0 to 3.6 V, USBAPVCC = 3.0 to 3.6 V,
2DGAPVCC0 = 3.0 to 3.6 V, 2DGAPVCC1 = 3.0 to 3.6 V,
VSS = PLLVSS = USBAVSS = AVSS = USBAPVSS = 2DGAPVSS0 = 2DGAPVSS1 = 0 V,
Ta = −40 to 85 °C
Item
Symbol Min.
Max.
Unit
TCK cycle time
t_TCKcyc
50*

ns
TCK high pulse width
t
0.4
0.6
t
TCKH
TCKcyc
TCK low pulse width
t
0.4
0.6
t
TCKL
TCKcyc
TDI setup time
t
10
TDIS

ns
TDI hold time
t_TDIH
10

ns
TMS setup time
t
10
TMSS

ns
TMS hold time
t_TMSH
10

ns
TDO delay time
t_TDOD

16
ns
Capture register setup time t_CAPTS
10

ns
Capture register hold time t
10
CAPTH

ns
Update register delay time t
UPDATED

20
ns
Note: * Should be greater than the peripheral clock (Pφ) cycle time.
Figure
Figure 36.89
Figure 36.90
Figure 36.91
1/2 PVcc
t_TCKH
t_TCKcyc
t_TCKL
V_IH
V_IH
V_IL
V_IL
V_IH
1/2 PVcc
Figure 36.89 TCK Input Timing
Rev. 1.00 Mar. 14, 2008 Page 1956 of 1984
REJ09B0351-0100