C8051F93X Datasheet, PDF (91/330 Pages) Silicon Laboratories – Pipelined intstruction architecture executes 70 of instruction in 1 or 2 system clocks

C8051F93x-C8051F92x
SFR Definition 5.15. REF0CN: Voltage Reference Control
Bit
7
6
5
4
3
2
1
0
Name
Type
R
Reset
0
REFGND
REFSL
TEMPE
REFOE
R
R/W
R/W
R/W
R/W
R
R/W
0
0
1
1
0
0
0
SFR Page = 0x0; SFR Address = 0xD1
Bit Name
Function
7:6 Unused Unused.
Read = 00b; Write = Don’t Care.
5 REFGND Analog Ground Reference.
Selects the ADC0 ground reference.
0: The ADC0 ground reference is the GND pin.
1: The ADC0 ground reference is the P0.1/AGND pin.
4:3 REFSL Voltage Reference Select.
Selects the ADC0 voltage reference.
00: The ADC0 voltage reference is the P0.0/VREF pin.
01: The ADC0 voltage reference is the VDD/DC+ pin.
10: The ADC0 voltage reference is the internal 1.8 V digital supply voltage.
11: The ADC0 voltage reference is the internal 1.65 V high speed voltage reference.
2
TEMPE Temperature Sensor Enable.
Enables/Disables the internal temperature sensor.
0: Temperature Sensor Disabled.
1: Temperature Sensor Enabled.
1
Unused Unused.
Read = 0b; Write = Don’t Care.
0
REFOE Internal Voltage Reference Output Enable.
Connects/Disconnects the internal voltage reference to the P0.0/VREF pin.
0: Internal 1.68 V Precision Voltage Reference disabled and not connected to
P0.0/VREF.
1: Internal 1.68 V Precision Voltage Reference enabled and connected to
P0.0/VREF.
5.12. Voltage Reference Electrical Specifications
See Table 4.11 on page 62 for detailed Voltage Reference Electrical Specifications.
Rev. 1.3
91