C8051F93X Datasheet, PDF (100/330 Pages) Silicon Laboratories – Pipelined intstruction architecture executes 70 of instruction in 1 or 2 system clocks

C8051F93x-C8051F92x
7.6. Comparator0 and Comparator1 Analog Multiplexers
Comparator0 and Comparator1 on C8051F93x-C8051F92x devices have analog input multiplexers to con-
nect Port I/O pins and internal signals the comparator inputs; CP0+/CP0- are the positive and negative
input multiplexers for Comparator0 and CP1+/CP1- are the positive and negative input multiplexers for
Comparator1.
The comparator input multiplexers directly support capacitive touch switches. When the Capacitive Touch
Sense Compare input is selected on the positive or negative multiplexer, any Port I/O pin connected to the
other multiplexer can be directly connected to a capacitive touch switch with no additional external compo-
nents. The Capacitive Touch Sense Compare provides the appropriate reference level for detecting when
the capacitive touch switches have charged or discharged through the on-chip Rsense resistor. The Com-
parator outputs can be routed to Timer2 or Timer3 for capturing sense capacitor’s charge and discharge
time. See Section “25. Timers” on page 283 for details.
Any of the following may be selected as comparator inputs: Port I/O pins, Capacitive Touch Sense Com-
pare, VDD/DC+ Supply Voltage, Regulated Digital Supply Voltage (Output of VREG0), the VBAT Supply
voltage or ground. The Comparator’s supply voltage divided by 2 is also available as an input; the resistors
used to divide the voltage only draw current when this setting is selected. The Comparator input multiplex-
ers are configured using the CPT0MX and CPT1MX registers described in SFR Definition 7.5 and SFR
Definition 7.6.
CPTnMX
P0.1
P0.3
P0.5
P0.7
P1.1
P1.3
P1.5
P1.7*
P2.1*
P2.3*
P2.5*
VDD/DC+ CPnOUT
R
R
Capacitive
Touch
Sense
Compare
R ^{(1/3 or 2/3) x VDD/DC+}
CPn-
Input
MUX
P0.0
P0.2
P0.4
CPnOUT
P0.6
P1.0
P1.2
Rsense
Only enabled when
Capacitive Touch
Sense Compare is
selected on CPn+
Input MUX.
P1.4
P1.6
P2.0*
P2.2*
P2.4*
P2.6*
Capacitive
VDD/DC+ CPnOUT _Touch
R
R
Sense
Compare
R ^{(1/3 or 2/3) x VDD/DC+}
CPnOUT
CPn+
Input
MUX
Rsense
Only enabled when
Capacitive Touch
Sense Compare is
selected on CPn-
Input MUX.
VDD/DC+
+
-
VDD/DC+
VDD/DC+
GND
R
½ x VDD/DC+
R
½ x VDD/DC+
R Digital Supply
GND
R
VBAT
VDD/DC+
*P1.7-P2.5 only available as
inputs on 32-pin packages
*P2.0-P2.6 only available as
inputs on 32-pin packages
Figure 7.4. CPn Multiplexer Block Diagram
Important Note About Comparator Input Configuration: Port pins selected as comparator inputs should
be configured as analog inputs, and should be skipped by the Digital Crossbar. To configure a Port pin for
analog input, set to 0 the corresponding bit in register PnMDIN and disable the digital driver (PnMDOUT =
0 and Port Latch = 1). To force the Crossbar to skip a Port pin, set to 1 the corresponding bit in register
PnSKIP. See Section “21. Port Input/Output” on page 216 for more Port I/O configuration details.
100
Rev. 1.3