C8051F93X Datasheet, PDF (209/330 Pages) Silicon Laboratories – Pipelined intstruction architecture executes 70 of instruction in 1 or 2 system clocks

C8051F93x-C8051F92x
Table 20.3 shows a summary of the oscillator bias settings. The SmaRTClock Bias Doubling feature allows
the self-oscillation frequency to be increased (almost doubled) and allows a higher crystal drive strength in
crystal mode. High crystal drive strength is recommended when the crystal is exposed to poor
environmental conditions such as excessive moisture. SmaRTClock Bias Doubling is enabled by setting
BIASX2 (RTC0XCN.5) to 1.
.
Table 20.3. SmaRTClock Bias Settings
Mode
Crystal
Self-Oscillate
Setting
Power
Consumption
Bias Double Off, AGC On
Lowest
600 nA
Bias Double Off, AGC Off
Low
800 nA
Bias Double On, AGC On
High
Bias Double On, AGC Off
Highest
Bias Double Off
Low
Bias Double On
High
Rev. 1.3
209