C8051F93X Datasheet, PDF (159/330 Pages) Silicon Laboratories – Pipelined intstruction architecture executes 70 of instruction in 1 or 2 system clocks

C8051F93x-C8051F92x
14. Power Management
C8051F93x-C8051F92x devices support 5 power modes: Normal, Idle, Stop, Suspend, and Sleep. The
power management unit (PMU0) allows the device to enter and wake-up from the available power modes.
A brief description of each power mode is provided in Table 14.1. Detailed descriptions of each mode can
be found in the following sections.
Table 14.1. Power Modes
Power Mode
Description
Wake-Up
Sources
Power Savings
Normal
Device fully functional
N/A
Excellent MIPS/mW
Idle
All peripherals fully functional.
Any Interrupt.
Good
Very easy to wake up.
No Code Execution
Stop
Legacy 8051 low power mode.
A reset is required to wake up.
Any Reset.
Good
No Code Execution
Precision Oscillator Disabled
Suspend
Similar to Stop Mode, but very fast
wake-up time and code resumes
execution at the next instruction.
SmaRTClock,
Port Match,
Comparator0,
RST pin.
Very Good
No Code Execution
All Internal Oscillators Disabled
System Clock Gated
Sleep
Ultra Low Power and flexible
wake-up sources. Code resumes
execution at the next instruction.
Comparator0 only functional in
two-cell mode.
SmaRTClock,
Port Match,
Comparator0,
RST pin.
Excellent
Power Supply Gated
All Oscillators except SmaRT-
Clock Disabled
In battery powered systems, the system should spend as much time as possible in sleep mode in order to
preserve battery life. When a task with a fixed number of clock cycles needs to be performed, the device
should switch to normal mode, finish the task as quickly as possible, and return to sleep mode. Idle mode
and suspend modes provide a very fast wake-up time; however, the power savings in these modes will not
be as much as in sleep Mode. Stop Mode is included for legacy reasons; the system will be more power
efficient and easier to wake up when idle, suspend, or sleep mode are used.
Although switching power modes is an integral part of power management, enabling/disabling individual
peripherals as needed will help lower power consumption in all power modes. Each analog peripheral can
be disabled when not in use or placed in a low power mode. Digital peripherals such as timers or serial
busses draw little power whenever they are not in use. Digital peripherals draw no power in Sleep Mode.
Rev. 1.3
159