C8051F93X Datasheet, PDF (199/330 Pages) Silicon Laboratories – Pipelined intstruction architecture executes 70 of instruction in 1 or 2 system clocks

C8051F93x-C8051F92x
SFR Definition 19.4. OSCXCN: External Oscillator Control
Bit
7
6
5
4
3
2
1
0
Name XCLKVLD
Type
R
Reset
0
XOSCMD[2:0]
R
R/W
R/W
0
0
0
Reserved
R/W
0
XFCN[2:0]
R/W
R/W
R/W
0
0
0
SFR Page = 0x0; SFR Address = 0xB1
Bit Name
Function
7 XCLKVLD External Oscillator Valid Flag.
Provides External Oscillator status and is valid at all times for all modes of operation
except External CMOS Clock Mode and External CMOS Clock Mode with divide by
2. In these modes, XCLKVLD always returns 0.
0: External Oscillator is unused or not yet stable.
1: External Oscillator is running and stable.
6:4 XOSCMD External Oscillator Mode Bits.
Configures the external oscillator circuit to the selected mode.
00x: External Oscillator circuit disabled.
010: External CMOS Clock Mode.
011: External CMOS Clock Mode with divide by 2 stage.
100: RC Oscillator Mode.
101: Capacitor Oscillator Mode.
110: Crystal Oscillator Mode.
111: Crystal Oscillator Mode with divide by 2 stage.
3 Reserved Reserved.
Read = 0b. Must Write 0b.
2:0 XFCN External Oscillator Frequency Control Bits.
Controls the external oscillator bias current.
000-111: See Table 19.1 on page 193 (Crystal Mode) or Table 19.2 on page 194 (RC
or C Mode) for recommended settings.
Rev. 1.3
199