C8051F93X Datasheet, PDF (275/330 Pages) Silicon Laboratories – Pipelined intstruction architecture executes 70 of instruction in 1 or 2 system clocks

C8051F93x-C8051F92x
24.6. SPI Special Function Registers
SPI0 and SPI1 are accessed and controlled through four special function registers (8 registers total) in the
system controller: SPInCN Control Register, SPInDAT Data Register, SPInCFG Configuration Register,
and SPInCKR Clock Rate Register. The special function registers related to the operation of the SPI0 and
SPI1 Bus are described in the following figures.
Rev. 1.3
275