C8051F93X Datasheet, PDF (32/330 Pages) Silicon Laboratories – Pipelined intstruction architecture executes 70 of instruction in 1 or 2 system clocks

C8051F93x-C8051F92x
GND/DC- 1
GND 2
VDD/DC+ 3
DCEN 4
VBAT 5
RST/C2CK 6
C8051F931/21-GM
Top View
GND (optional)
18 P0.6/CNVSTR
17 P0.7/IREF0
16 P1.0
15 P1.1
14 P1.2
13 P1.3
Figure 3.2. QFN-24 Pinout Diagram (Top View)
32
Rev. 1.3