C8051F93X Datasheet, PDF (6/330 Pages) Silicon Laboratories – Pipelined intstruction architecture executes 70 of instruction in 1 or 2 system clocks

C8051F93x-C8051F92x
18.7.Flash Error Reset ........................................................................................... 189
18.8.SmaRTClock (Real Time Clock) Reset .......................................................... 189
18.9.Software Reset ............................................................................................... 189
19. Clocking Sources ................................................................................................. 191
19.1.Programmable Precision Internal Oscillator ................................................... 192
19.2.Low Power Internal Oscillator......................................................................... 192
19.3.External Oscillator Drive Circuit...................................................................... 192
19.3.1.External Crystal Mode............................................................................ 192
19.3.2.External RC Mode.................................................................................. 194
19.3.3.External Capacitor Mode........................................................................ 195
19.3.4.External CMOS Clock Mode .................................................................. 196
19.4.Special Function Registers for Selecting and Configuring the System Clock 197
20. SmaRTClock (Real Time Clock) .......................................................................... 200
20.1.SmaRTClock Interface ................................................................................... 201
20.1.1.SmaRTClock Lock and Key Functions................................................... 201
20.1.2.Using RTC0ADR and RTC0DAT to Access SmaRTClock Internal Registers
..................................................................................................... 202
20.1.3.RTC0ADR Short Strobe Feature............................................................ 202
20.1.4.SmaRTClock Interface Autoread Feature .............................................. 203
20.1.5.RTC0ADR Autoincrement Feature......................................................... 203
20.2.SmaRTClock Clocking Sources ..................................................................... 206
20.2.1.Using the SmaRTClock Oscillator with a Crystal or 
External CMOS Clock ............................................................................ 206
20.2.2.Using the SmaRTClock Oscillator in Self-Oscillate Mode...................... 206
20.2.3.Programmable Load Capacitance.......................................................... 207
20.2.4.Automatic Gain Control (Crystal Mode Only) and SmaRTClock 
Bias Doubling ......................................................................................... 208
20.2.5.Missing SmaRTClock Detector .............................................................. 210
20.2.6.SmaRTClock Oscillator Crystal Valid Detector ...................................... 210
20.3.SmaRTClock Timer and Alarm Function ........................................................ 210
20.3.1.Setting and Reading the SmaRTClock Timer Value .............................. 210
20.3.2.Setting a SmaRTClock Alarm ................................................................ 211
20.3.3.Software Considerations for using the SmaRTClock Timer and Alarm . 211
21. Port Input/Output.................................................................................................. 216
21.1.Port I/O Modes of Operation........................................................................... 217
21.1.1.Port Pins Configured for Analog I/O....................................................... 217
21.1.2.Port Pins Configured For Digital I/O....................................................... 217
21.1.3.Interfacing Port I/O to 5 V and 3.3 V Logic............................................. 218
21.1.4.Increasing Port I/O Drive Strength ......................................................... 218
21.2.Assigning Port I/O Pins to Analog and Digital Functions................................ 218
21.2.1.Assigning Port I/O Pins to Analog Functions ......................................... 218
21.2.2.Assigning Port I/O Pins to Digital Functions........................................... 220
21.2.3.Assigning Port I/O Pins to External Digital Event Capture Functions .... 220
21.3.Priority Crossbar Decoder .............................................................................. 221
21.4.Port Match ...................................................................................................... 227
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Rev. 1.3