C8051F93X Datasheet, PDF (90/330 Pages) Silicon Laboratories – Pipelined intstruction architecture executes 70 of instruction in 1 or 2 system clocks

C8051F93x-C8051F92x
5.8. External Voltage References
To use an external voltage reference, REFSL[1:0] should be set to 00 and the internal 1.68 V precision ref-
erence should be disabled by setting REFOE to 0. Bypass capacitors should be added as recommended
by the manufacturer of the external voltage reference.
5.9. Internal Voltage References
For applications requiring the maximum number of port I/O pins, or very short VREF turn-on time, the
1.65 V high-speed reference will be the best internal reference option to choose. The high speed internal
reference is selected by setting REFSL[1:0] to 11. When selected, the high speed internal reference will be
automatically enabled/disabled on an as-needed basis by ADC0.
For applications requiring the highest absolute accuracy, the 1.68 V precision voltage reference will be the
best internal reference option to choose. The 1.68 V precision reference may be enabled and selected by
setting REFOE to 1 and REFSL[1:0] to 00. An external capacitor of at least 0.1 µF is recommended when
using the precision voltage reference.
In applications that leave the precision internal oscillator always running, there is no additional power
required to use the precision voltage reference. In all other applications, using the high speed reference
will result in lower overall power consumption due to its minimal startup time and the fact that it remains in
a low power state when an ADC conversion is not taking place.
Note: When using the precision internal oscillator as the system clock source, the precision volt-
age reference should not be enabled from a disabled state. To use the precision oscillator and the
precision voltage reference simultaneously, the precision voltage reference should be enabled first
and allowed to settle to its final value (charging the external capacitor) before the precision oscilla-
tor is started and selected as the system clock.
For applications with a non-varying power supply voltage, using the power supply as the voltage reference
can provide ADC0 with added dynamic range at the cost of reduced power supply noise rejection. To use
the 1.8 to 3.6 V power supply voltage (V_DD/DC+) or the 1.8 V regulated digital supply voltage as the refer-
ence source, REFSL[1:0] should be set to 01 or 10, respectively.
5.10. Analog Ground Reference
To prevent ground noise generated by switching digital logic from affecting sensitive analog measure-
ments, a separate analog ground reference option is available. When enabled, the ground reference for
ADC0 during both the tracking/sampling and the conversion periods is taken from the P0.1/AGND pin. Any
external sensors sampled by ADC0 should be referenced to the P0.1/AGND pin. This pin should be con-
nected to the ground terminal of any external sensors sampled by ADC0. If an external voltage reference is
used, the P0.1/AGND pin should be connected to the ground of the external reference and its associated
decoupling capacitor. If the 1.68 V precision internal reference is used, then P0.1/AGND should be con-
nected to the ground terminal of its external decoupling capacitor. The separate analog ground reference
option is enabled by setting REFGND to 1. Note that when sampling the internal temperature sensor, the
internal chip ground is always used for the sampling operation, regardless of the setting of the REFGND
bit. Similarly, whenever the internal 1.65 V high-speed reference is selected, the internal chip ground is
always used during the conversion period, regardless of the setting of the REFGND bit.
5.11. Temperature Sensor Enable
The TEMPE bit in register REF0CN enables/disables the temperature sensor. While disabled, the temper-
ature sensor defaults to a high impedance state and any ADC0 measurements performed on the sensor
result in meaningless data. See Section “5.6. Temperature Sensor” on page 86 for details on temperature
sensor characteristics when it is enabled.
90
Rev. 1.3