C8051F93X Datasheet, PDF (31/330 Pages) Silicon Laboratories – Pipelined intstruction architecture executes 70 of instruction in 1 or 2 system clocks

C8051F93x-C8051F92x
GND/DC- 1
GND 2
VDD/DC+ 3
DCEN 4
VBAT 5
RST/C2CK 6
P2.7/C2D 7
P2.6/WR 8
C8051F930/20-GM
Top View
GND (optional)
24 P1.0/AD0
23 P1.1/AD1
22 P1.2/AD2
21 P1.3/AD3
20 P1.4/AD4
19 P1.5/AD5
18 P1.6/AD6
17 P1.7/AD7
Figure 3.1. QFN-32 Pinout Diagram (Top View)
Rev. 1.3
31