C8051F93X Datasheet, PDF (325/330 Pages) Silicon Laboratories – Pipelined intstruction architecture executes 70 of instruction in 1 or 2 system clocks

C8051F93x-C8051F92x
C2 Register Definition 27.2. DEVICEID: C2 Device ID
Bit
7
6
5
4
3
2
1
0
Name
DEVICEID[7:0]
Type
R/W
Reset
0
0
0
1
0
1
0
0
C2 Address: 0x00
Bit
Name
Function
7:0 DEVICEID[7:0] Device ID.
This read-only register returns the 8-bit device ID: 0x16 (C8051F93x-C8051F92x).
C2 Register Definition 27.3. REVID: C2 Revision ID
Bit
7
6
5
4
3
2
1
0
Name
REVID[7:0]
Type
R/W
Reset Varies
Varies
Varies
Varies
Varies
Varies
Varies
Varies
C2 Address: 0x01
Bit Name
Function
7:0 REVID[7:0] Revision ID.
This read-only register returns the 8-bit revision ID. For example: 0x00 = Revision A.
Rev. 1.3
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