C8051F93X Datasheet, PDF (81/330 Pages) Silicon Laboratories – Pipelined intstruction architecture executes 70 of instruction in 1 or 2 system clocks

C8051F93x-C8051F92x
5.4. Programmable Window Detector
The ADC Programmable Window Detector continuously compares the ADC0 output registers to user-
programmed limits, and notifies the system when a desired condition is detected. This is especially
effective in an interrupt-driven system, saving code space and CPU bandwidth while delivering faster
system response times. The window detector interrupt flag (AD0WINT in register ADC0CN) can also be
used in polled mode. The ADC0 Greater-Than (ADC0GTH, ADC0GTL) and Less-Than (ADC0LTH,
ADC0LTL) registers hold the comparison values. The window detector flag can be programmed to indicate
when measured data is inside or outside of the user-programmed limits, depending on the contents of the
ADC0 Less-Than and ADC0 Greater-Than registers.
SFR Definition 5.8. ADC0GTH: ADC0 Greater-Than High Byte
Bit
7
6
5
4
3
2
1
0
Name
Type
AD0GT[15:8]
R/W
Reset
1
1
1
1
1
1
1
1
SFR Page = 0x0; SFR Address = 0xC4
Bit
Name
Function
7:0 AD0GT[15:8] ADC0 Greater-Than High Byte.
Most Significant Byte of the 16-bit Greater-Than window compare register.
SFR Definition 5.9. ADC0GTL: ADC0 Greater-Than Low Byte
Bit
7
6
5
4
3
2
1
0
Name
Type
AD0GT[7:0]
R/W
Reset
1
1
1
1
1
1
1
1
SFR Page = 0x0; SFR Address = 0xC3
Bit Name
Function
7:0 AD0GT[7:0] ADC0 Greater-Than Low Byte.
Least Significant Byte of the 16-bit Greater-Than window compare register.
Note: In 8-bit mode, this register should be set to 0x00.
Rev. 1.3
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