C8051F93X Datasheet, PDF (177/330 Pages) Silicon Laboratories – Pipelined intstruction architecture executes 70 of instruction in 1 or 2 system clocks

C8051F93x-C8051F92x
16.2. High Power Applications
The dc-dc converter is designed to provide the system with 65 mW of output power, however, it can safely
provide up to 100 mW of output power without any risk of damage to the device. For high power applica-
tions, the system should be carefully designed to prevent unwanted VBAT and VDD/DC+ Supply Monitor
resets, which are more likely to occur when the dc-dc converter output power exceeds 65mW. In addition,
output power above 65 mW causes the dc-dc converter to have relaxed output regulation, high output rip-
ple and more analog noise. At high output power, an inductor with low DC resistance should be chosen in
order to minimize power loss and maximize efficiency.
The combination of high output power and low input voltage will result in very high peak and average
inductor currents. If the power supply has a high internal resistance, the transient voltage on the VBAT ter-
minal could drop below 0.9 V and trigger a VBAT Supply Monitor Reset, even if the open-circuit voltage is
well above the 0.9 V threshold. While this problem is most often associated with operation from very small
batteries or batteries that are near the end of their useful life, it can also occur when using bench power
supplies that have a slow transient response; the supply’s display may indicate a voltage above 0.9 V, but
the minimum voltage on the VBAT pin may be lower. A similar problem can occur at the output of the dc-dc
converter: using the default low current limit setting (125 mA) can trigger V_DD Supply Monitor resets if there
is a high transient load current, particularly if the programmed output voltage is at or near 1.8 V.
16.3. Pulse Skipping Mode
The dc-dc converter allows the user to set the minimum pulse width such that if the duty cycle needs to
decrease below a certain width in order to maintain regulation, an entire "clock pulse" will be skipped.
Pulse skipping can provide substantial power savings, particularly at low values of load current. The con-
verter will continue to maintain a minimum output voltage at its programmed value when pulse skipping is
employed, though the output voltage ripple can be higher. Another consideration is that the dc-dc will oper-
ate with pulse-frequency modulation rather than pulse-width modulation, which makes the switching fre-
quency spectrum less predictable; this could be an issue if the dc-dc converter is used to power a radio.
Figure 4.5 and Figure 4.6 on page 52 and 53 show the effect of pulse skipping on power consumption.
Rev. 1.3
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