C8051F93X Datasheet, PDF (48/330 Pages) Silicon Laboratories – Pipelined intstruction architecture executes 70 of instruction in 1 or 2 system clocks

C8051F93x-C8051F92x
4200
4100
F < 10 MHz
4000
Oneshot Enabled
3900
F > 10 MHz
Oneshot Bypassed
3800
3700
3600
3500
3400
< 170 µA/MHz
3300
3200
3100
3000
2900
200 µA/MHz
2800
2700
2600
215 µA/MHz
2500
2400
2300
2200
2100
2000
1900
1800
1700
1600
1500
1400
240 µA/MHz
1300
1200
1100
1000
900
800
250 µA/MHz
700
600
500
400
300
300 µA/MHz
200
100
0
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
Frequency (MHz)
Figure 4.1. Active Mode Current (External CMOS Clock)
48
Rev. 1.3