C8051F93X Datasheet, PDF (200/330 Pages) Silicon Laboratories – Pipelined intstruction architecture executes 70 of instruction in 1 or 2 system clocks

C8051F93x-C8051F92x
20. SmaRTClock (Real Time Clock)
C8051F93x-C8051F92x devices include an ultra low power 32-bit SmaRTClock Peripheral (Real Time
Clock) with alarm. The SmaRTClock has a dedicated 32 kHz oscillator that can be configured for use with
or without a crystal. No external resistor or loading capacitors are required. The on-chip loading capacitors
are programmable to 16 discrete levels allowing compatibility with a wide range of crystals. The SmaRT-
Clock can operate directly from a 0.9–3.6 V battery voltage and remains operational even when the device
goes into its lowest power down mode.
The SmaRTClock allows a maximum of 36 hour 32-bit independent time-keeping when used with a
32.768 kHz Watch Crystal. The SmaRTClock provides an Alarm and Missing SmaRTClock events, which
could be used as reset or wakeup sources. See Section “18. Reset Sources” on page 184 and Section
“14. Power Management” on page 159 for details on reset sources and low power mode wake-up sources,
respectively.
XTAL4
XTAL3
Programmable Load Capacitors
SmaRTClock Oscillator
SmaRTClock
32-Bit
SmaRTClock
Timer
Power/
Clock
Mgmt
SmaRTClock State Machine
Wake-Up
Interrupt
Internal
Registers
CAPTUREn
RTC0CN
RTC0XCN
RTC0XCF
RTC0PIN
ALARMn
Interface
Registers
RTC0KEY
RTC0ADR
RTC0DAT
Figure 20.1. SmaRTClock Block Diagram
200
Rev. 1.3