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C8051F93X Datasheet, PDF (178/330 Pages) Silicon Laboratories – Pipelined intstruction architecture executes 70 of instruction in 1 or 2 system clocks | |||
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C8051F93x-C8051F92x
16.4. Enabling the DC-DC Converter
On power-on reset, the state of the DCEN pin is sampled to determine if the device will power up in one-
cell or two-cell mode. In two-cell mode, the dc-dc converter always remains disabled. In one-cell mode, the
dc-dc converter remains disabled in Sleep Mode, and enabled in all other power modes. See Section
â14. Power Managementâ on page 159 for complete details on available power modes.
The dc-dc converter is enabled (one-cell mode) in hardware by placing a 0.68 µH inductor between DCEN
and VBAT. The dc-dc converter is disabled (two-cell mode) by shorting DCEN directly to GND. The DCEN
pin should never be left floating. Note that the device can only switch between one-cell and two-cell mode
during a power-on reset. See Section â18. Reset Sourcesâ on page 184 for more information regarding
reset behavior.
Figure 16.2 shows the two dc-dc converter configuration options.
DC-DC Converterï
Enabled
0.9 to 1.8 V ï
Supply Voltage
(one-cell mode)
4.7 uF
0.68 uH
1 uF
VBAT
GND DCEN VDD/DC+ GND/DC-
DC-DC Converterï
Disabled
1.8 to 3.6 V ï
Supply Voltage
(two-cell mode)
VBAT
GND DCEN VDD/DC+ GND/DC-
Figure 16.2. DC-DC Converter Configuration Options
When the dc-dc converter âEnabledâ configuration (one-cell mode) is chosen, the following guidelines
apply:
⢠In most cases, the GND/DCâ pin should not be externally connected to GND.
⢠The 0.68 µH inductor should be placed as close as possible to the DCEN pin for maximum efficiency.
⢠The 4.7 µF capacitor should be placed as close as possible to the inductor.
⢠The current loop including GND, the 4.7 µF capacitor, the 0.68 µH inductor and the DCEN pin should
be made as short as possible.
⢠The PCB traces connecting VDD/DC+ to the output capacitor and the output capacitor to GND/DCâ
should be as short and as thick as possible in order to minimize parasitic inductance.
178
Rev. 1.3
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