C8051F93X Datasheet, PDF (54/330 Pages) Silicon Laboratories – Pipelined intstruction architecture executes 70 of instruction in 1 or 2 system clocks

C8051F93x-C8051F92x
Table 4.3. Port I/O DC Electrical Characteristics
V_DD = 1.8 to 3.6 V, –40 to +85 °C unless otherwise specified.
Parameters
Conditions
Output High Voltage High Drive Strength, PnDRV.n = 1
IOH = –3 mA, Port I/O push-pull
IOH = –10 µA, Port I/O push-pull
IOH = –10 mA, Port I/O push-pull
Low Drive Strength, PnDRV.n = 0
Min
Typ
Max Units
V_DD – 0.7
—
—
V_DD – 0.1
—
—
See Chart
V
IOH = –1 mA, Port I/O push-pull
IOH = –10 µA, Port I/O push-pull
IOH = –3 mA, Port I/O push-pull
V_DD – 0.7
—
—
V_DD – 0.1
—
—
—
See Chart
—
Output Low Voltage High Drive Strength, PnDRV.n = 1
I_OL = 8.5 mA
I_OL = 10 µA
—
—
0.6
—
—
0.1
I_OL = 25 mA
—
See Chart
—
V
Low Drive Strength, PnDRV.n = 0
I_OL = 1.4 mA
—
—
0.6
I_OL = 10 µA
I_OL = 4 mA
—
—
0.1
—
See Chart
—
Input High Voltage V_DD = 2.0 to 3.6 V
V_DD – 0.6
—
—
V
V_DD = 0.9 to 2.0 V
0.7 x VDD
—
—
V
Input Low Voltage V_DD = 2.0 to 3.6 V
—
—
0.6
V
V_DD = 0.9 to 2.0 V
—
—
0.3 x VDD V
Weak Pullup Off
—
—
±1
Input Leakage 
Current
Weak Pullup On, V_IN = 0 V, V_DD = 1.8 V
—
4
—
µA
Weak Pullup On, Vin = 0 V, V_DD = 3.6 V
—
20
30
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