C8051F93X Datasheet, PDF (113/330 Pages) Silicon Laboratories – Pipelined intstruction architecture executes 70 of instruction in 1 or 2 system clocks

C8051F93x-C8051F92x
9.1. Program Memory
The CIP-51 core has a 64 kB program memory space. The C8051F93x-C8051F92x implements 64 kB
(C8051F930/1) or 32 kB (C8051F920/1) of this program memory space as in-system, re-programmable
Flash memory, organized in a contiguous block from addresses 0x0000 to 0xFBFF (C8051F930/1) or
0x7FFF (C8051F920/1). The address 0xFBFF (C8051F930/1) or 0x7FFF (C8051F920/1) serves as the
security lock byte for the device. Any addresses above the lock byte are reserved.
C8051F930/1
C8051F920/1
(SFLE=1)
Scratchpad
(Data Only)
0x03FF
0x0000
C8051F930/1
(SFLE=0)
Reserved Area
Lock Byte
Lock Byte Page
0xFFFF
0xFC00
0xFBFF
0xFBFE
0xF800
0xF7FF
Flash Memory Space
C8051F920/1
(SFLE=0)
Unpopulated
Address Space
(Reserved)
Lock Byte
Lock Byte Page
Flash Memory Space
0x0000
Figure 9.2. Flash Program Memory Map
0xFFFF
0x8000
0x7FFF
0x7FFE
0x7C00
0x7BFF
0x0000
9.1.1. MOVX Instruction and Program Memory
The MOVX instruction in an 8051 device is typically used to access external data memory. On the
C8051F93x-C8051F92x devices, the MOVX instruction is normally used to read and write on-chip XRAM,
but can be re-configured to write and erase on-chip Flash memory space. MOVC instructions are always
used to read Flash memory, while MOVX write instructions are used to erase and write Flash. This Flash
access feature provides a mechanism for the C8051F93x-C8051F92x to update program code and use
the program memory space for non-volatile data storage. Refer to Section “13. Flash Memory” on
page 148 for further details.
Rev. 1.3
113