C8051F93X Datasheet, PDF (279/330 Pages) Silicon Laboratories – Pipelined intstruction architecture executes 70 of instruction in 1 or 2 system clocks

C8051F93x-C8051F92x
SFR Definition 24.4. SPInDAT: SPI Data
Bit
7
6
5
4
3
2
1
0
Name
SPInDAT[7:0]
Type
R/W
Reset
0
0
0
0
0
0
0
0
SFR Addresses: SPI0DAT = 0xA3, SPI1DAT = 0x86 
SFR Pages: SPI0DAT = 0x0, SPI1DAT = 0x0
Bit
Name
Function
7:0 SPInDAT SPIn Transmit and Receive Data.
The SPInDAT register is used to transmit and receive SPIn data. Writing data to
SPInDAT places the data into the transmit buffer and initiates a transfer when in
Master Mode. A read of SPInDAT returns the contents of the receive buffer.
Rev. 1.3
279