C8051F93X Datasheet, PDF (324/330 Pages) Silicon Laboratories – Pipelined intstruction architecture executes 70 of instruction in 1 or 2 system clocks

C8051F93x-C8051F92x
27. C2 Interface
C8051F93x-C8051F92x devices include an on-chip Silicon Labs 2-Wire (C2) debug interface to allow
Flash programming and in-system debugging with the production part installed in the end application. The
C2 interface uses a clock signal (C2CK) and a bi-directional C2 data signal (C2D) to transfer information
between the device and a host system. See the C2 Interface Specification for details on the C2 protocol.
27.1. C2 Interface Registers
The following describes the C2 registers necessary to perform Flash programming through the C2 inter-
face. All C2 registers are accessed through the C2 interface as described in the C2 Interface Specification.
C2 Register Definition 27.1. C2ADD: C2 Address
Bit
7
6
5
4
3
2
1
0
Name
C2ADD[7:0]
Type
R/W
Reset
0
0
0
0
0
0
0
0
Bit Name
Function
7:0 C2ADD[7:0] C2 Address.
The C2ADD register is accessed via the C2 interface to select the target Data register
for C2 Data Read and Data Write commands.
Address
0x00
0x01
0x02
0xB4
Description
Selects the Device ID register for Data Read instructions
Selects the Revision ID register for Data Read instructions
Selects the C2 Flash Programming Control register for Data
Read/Write instructions
Selects the C2 Flash Programming Data register for Data
Read/Write instructions
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Rev. 1.3