C8051F93X Datasheet, PDF (257/330 Pages) Silicon Laboratories – Pipelined intstruction architecture executes 70 of instruction in 1 or 2 system clocks

C8051F93x-C8051F92x
Table 22.5. SMBus Status Decoding With Hardware ACK Generation Disabled (EHACK = 0)
Values Read
Values to
Write
Current SMbus State
Typical Response Options
0
0
0
A slave byte was transmitted;
NACK received.
No action required (expecting
STOP condition).
0 0 X 0001
0100
0
0
1
A slave byte was transmitted;
ACK received.
Load SMB0DAT with next data
byte to transmit.
0 0 X 0100
0
1
X
A Slave byte was transmitted;
error detected.
No action required (expecting
Master to end transfer).
0 0 X 0001
An illegal STOP or bus error
0101 0 X X was detected while a Slave Clear STO.
Transmission was in progress.
00X -
1
0
X
A slave address + R/W was
received; ACK requested.
If Write, Acknowledge received
address
0 0 1 0000
If Read, Load SMB0DAT with
data byte; ACK received address
0
0
1
0100
NACK received address.
000 -
0010
If Write, Acknowledge received
address
0 0 1 0000
1
1
X
Lost arbitration as master;
slave address + R/W received;
If Read, Load SMB0DAT with
data byte; ACK received address
0
0
1
0100
ACK requested.
NACK received address.
000 -
Reschedule failed transfer;
NACK received address.
1 0 0 1110
A STOP was detected while
0 0 X addressed as a Slave Trans- Clear STO.
0001
mitter or Slave Receiver.
00X -
1
1
X
Lost arbitration while attempt-
ing a STOP.
No action required (transfer
complete/aborted).
000 -
0000
1
0
X
A slave byte was received;
ACK requested.
Acknowledge received byte;
Read SMB0DAT.
NACK received byte.
0 0 1 0000
000 -
0010
0
1
X
Lost arbitration while attempt-
ing a repeated START.
Abort failed transfer.
Reschedule failed transfer.
00X -
1 0 X 1110
0001
0
1
X
Lost arbitration due to a
detected STOP.
Abort failed transfer.
Reschedule failed transfer.
00X -
1 0 X 1110
0000
1
1
X
Lost arbitration while transmit-
ting a data byte as master.
Abort failed transfer.
Reschedule failed transfer.
000 -
1 0 0 1110
Rev. 1.3
257