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C8051F93X Datasheet, PDF (89/330 Pages) Silicon Laboratories – Pipelined intstruction architecture executes 70 of instruction in 1 or 2 system clocks
C8051F93x-C8051F92x
5.7. Voltage and Ground Reference Options
The voltage reference MUX is configurable to use an externally connected voltage reference, one of two
internal voltage references, or one of two power supply voltages (see Figure 5.10). The ground reference
MUX allows the ground reference for ADC0 to be selected between the ground pin (GND) or a port pin
dedicated to analog ground (P0.1/AGND).
The voltage and ground reference options are configured using the REF0CN SFR described on page 91.
Electrical specifications are can be found in the Electrical Specifications Chapter.
Important Note About the VREF and AGND Inputs: Port pins are used as the external VREF and AGND
inputs. When using an external voltage reference or the internal precision reference, P0.0/VREF should be
configured as an analog input and skipped by the Digital Crossbar. When using AGND as the ground
reference to ADC0, P0.1/AGND should be configured as an analog input and skipped by the Digital
Crossbar. Refer to Section “21. Port Input/Output” on page 216 for complete Port I/O configuration details.
The external reference voltage must be within the range 0  VREF  VDD/DC+ and the external ground
reference must be at the same DC voltage potential as GND.
VDD
R1
External
V o lta g e
R e fe re n c e
C irc u it
P 0 .0 /V R E F
V D D /D C +
GND
4.7F +
0.1F
GND
Recommended
Bypass Capacitors
P 0 .1 /A G N D
REF0CN
REFOE
EN
Internal 1.68V
Reference
Temp Sensor
EN
00
01
Internal 1.8V
10
Regulated Digital Supply
11
Internal 1.65V
High Speed Reference
0
1
ADC
Input
Mux
VREF
(to ADC)
G round
(to ADC)
REFGND
Figure 5.10. Voltage Reference Functional Block Diagram
Rev. 1.3
89