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HD64F3028F25 Datasheet, PDF (857/925 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series
RDR—Receive Data Register
Bit
7
6
5
H'FFFB5
4
3
2
SCI0
1
0
Initial value
0
0
0
0
0
0
Read/Write
R
R
R
R
R
R
SCMR—Smart Card Mode Register
Serial receive data
H'FFFB6
Bit
7
6
5
4
3
2
1
0
—
—
—
—
SDIR SINV
—
SMIF
Initial value
1
1
1
1
0
0
1
0
Read/Write
—
—
—
—
R/W
R/W
—
R/W
0
0
R
R
SCI0
Smart card interface mode select
0 Smart card interface function is disabled
1 Smart card interface function is enabled
(Initial value)
Smart card data invert
Unmodified TDR contents are transmitted
0 Receive data is stored unmodified in RDR
(Initial value)
Inverted 1/0 logic levels of TDR contents are transmitted
1 1/0 logic levels of received data are inverted before storage in RDR
Smart card data transfer direction
TDR contents are transmitted LSB-first
0 Receive data is stored LSB-first in RDR
TDR contents are transmitted MSB-first
1 Receive data is stored MSB-first in RDR
(Initial value)
Rev. 2.00, 09/03, page 825 of 890