HD64F3028F25 Datasheet, PDF (335/925 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Pin
PB2/TP10/
TMO2/CS5
PB1/TP9/
TMIO1/
DREQ0/CS6
Pin Functions and Selection Method
The DRAM interface settings by bits DRAS2 to DRAS0 in DRCRA, bits OIS3/2
and OS1/0 in 8TCSR2, bit CS5E in CSCR, bit NDER10 in NDERB, and bit
PB2DDR select the pin function as follows.
DRAM interface
settings
(1) in table below
(2) in
table
below
OIS3/2 and
OS1/0
All 0
Not all 0 —
CS5E
0
1
—
—
PB2DDR
NDER10
0
1
—
0
1
—
—
—
1
—
—
—
Pin function
PB2
input
PB2
output
Note: * CS5 is output as RAS5.
DRAM interface
(1)
settings
TP10
output
CS5
output
TMIO2
CS5
output output^*
(2)
(1)
DRAS2
0
1
DRAS1
0
1
0
1
DRAS0
0
1
0
1
0
1
0
1
Bits OIS3/2 and OS1/0 in 8TCSR1, bits CCLR1 and CCLR0 in TCR1, bit CS6E in
CSCR, bit NDER9 in NDERB, and bit PB1DDR select the pin function as follows.
OIS3/2 and
OS1/0
All 0
Not all 0
CS6E
0
1
—
PB1DDR
0
1
1
—
—
NDER9
—
0
1
—
—
Pin function
PB1
input
PB1
output
TP9
output
CS6
output
TMIO1
output
TMIO1 input^*1
DREQ0 input^*2
Notes: 1. TMIO1 input when CCLR1 = CCLR0 = 1.
2. When an external request is specified as a DMAC activation source,
DREQ0 input regardless of bits OIS3/2 and OS1/0, bits CCLR1/0, bit
CS6E, bit NDER9, and bit PB1DDR.
Rev. 2.00, 09/03, page 303 of 890