HD64F3028F25 Datasheet, PDF (127/925 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Table 5.3 Interrupt Sources, Vector Addresses, and Priority
Interrupt Source Origin
Vector
Vector Address^*
Number Advanced Mode Normal Mode IPR Priority
NMI
IRQ0
IRQ1
IRQ2
IRQ3
IRQ4
IRQ5
Reserved
External 7
pins
12
13
14
15
16
17
—
18
H'001C to H'001F H'000E to H'000F —
High
H'0030 to H'0033 H'0018 to H'0019 IPRA7
H'0034 to H0037 H'001A to H'001B IPRA6
H'0038 to H'003B H'001C to H'001D IPRA5
H'003C to H'003F H'001E to H'001F
H'0040 to H'0043 H'0020 to H'0021 IPRA4
H'0044 to H'0047 H'0022 to H'0023
H'0048 to H'004B H'0024 to H'0025
19
H'004C to H'004F H'0026 to H'0027
WOVI
(interval timer)
Watchdog 20
timer
H'0050 to H'0053 H'0028 to H'0029 IPRA3
CMI
DRAM
21
(compare match) interface
H'0054 to H'0057 H'002A to H'002B
Reserved
—
22
H'0058 to H'005B H'002C to H'002D
ADI (A/D end)
A/D
23
H'005C to H'005F H'002E to H'002F
IMIA0
16-bit timer 24
(compare match/ channel 0
input capture A0)
H'0060 to H'0063 H'0030 to H'0031 IPRA2
IMIB0
(compare match/
input capture B0)
25
H'0064 to H'0067 H'0032 to H'0033
OVI0
(overflow 0)
26
H'0068 to H'006B H'0034 to H'0035
Reserved
—
27
H'006C to H'006F H'0036 to H'0037
IMIA1
16-bit timer 28
(compare match/ channel 1
input capture A1)
H'0070 to H'0073 H'0038 to H'0039 IPRA1
IMIB1
(compare match/
input capture B1)
29
H'0074 to H'0077 H'003A to H'003B
OVI1
(overflow 1)
30
H'0078 to H'007B H'003C to H'003D
Reserved
—
31
H'007C to H'007F H'003E to H'003F
Low
Note: * Lower 16 bits of the address.
Rev. 2.00, 09/03, page 95 of 890