HD64F3028F25 Datasheet, PDF (329/925 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

8.12 Port B
8.12.1 Overview
Port B is an 8-bit input/output port that is also used for output (TP₁₅ to TP₈) from the
programmable timing pattern controller (TPC), input/output (TMIO₃, TMO₂, TMIO₁, TMO₀) by
the 8-bit timer, CS₇ to CS₄ output, input (DREQ₁, DREQ₀) to the DMA controller (DMAC), input
and output (TxD₂, RxD₂, SCK₂) by serial communication interface channel 2 (SCI2), and output
(UCAS, LCAS) by the DRAM interface. See table 8.23 to 8.24 for the selection of pin functions.
A reset or hardware standby transition leaves port B as an input port.
For output of CS₇ to CS₄ in modes 1 to 5, see section 6.3.4, Chip Select Signals. When DRAM is
connected to areas 2, 3, 4, and 5, the CS₄ and CS₅ output pins become RAS output pins for these
areas. For details see section 6.5, DRAM Interface. Pins not assigned to any of these functions are
available for generic input/output. Figure 8.11 shows the pin configuration of port B.
When DRAM is connected to areas 2, 3, 4, and 5, the CS₄ and CS₅ output pins become RAS
output pins for these areas. For details see section 6.5, DRAM Interface.
Pins in port B can drive one TTL load and a 30-pF capacitive load. They can also drive darlington
transistor pair.
Rev. 2.00, 09/03, page 297 of 890