HD64F3028F25 Datasheet, PDF (524/925 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Communication Formats
Four formats are available. Parity bit settings are ignored when a multiprocessor format is
selected. For details see table 13.10.
Clock
See the description of asynchronous mode.
Transmitting
processor
Receiving
processor A
(ID=01)
Serial communication line
Receiving
processor B
(ID=02)
Receiving
processor C
(ID=03)
Receiving
processor D
(ID=04)
Serial data
H'01
(MPB=1)
H'AA
(MPB=0)
ID-sending cycle:
Data-sending cycle:
receiving processor address data sent to receiving processor
specified by ID
Legend
MPB : Multiprocessor bit
Figure 13.9 Example of Communication among Processors using Multiprocessor Format
(Sending Data H'AA to Receiving Processor A)
Transmitting and Receiving Data
Transmitting Multiprocessor Serial Data: Figure 13.10 shows a sample flowchart for
transmitting multiprocessor serial data and indicates the procedure to follow.
Rev. 2.00, 09/03, page 492 of 890