HD64F3028F25 Datasheet, PDF (332/925 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Port B Data Register (PBDR): PBDR is an 8-bit readable/writable register that stores output data
for pins port B. When port B functions as an output port, the value of this register is output. When
a bit in PBDDR is set to 1, if port B is read the value of the corresponding PBDR bit is returned.
When a bit in PBDDR is cleared to 0, if port B is read the corresponding pin logic level is read.
Bit
Initial value
Read/Write
7
PB ₇
0
R/W
6
PB ₆
0
R/W
5
PB ₅
0
R/W
4
PB ₄
0
R/W
3
PB ₃
0
R/W
2
PB ₂
0
R/W
1
PB ₁
0
R/W
0
PB ₀
0
R/W
Port B data 7 to 0
These bits store data for port B pins
PBDR is initialized to H'00 by a reset and in hardware standby mode. In software standby mode it
retains its previous setting.
Rev. 2.00, 09/03, page 300 of 890