HD64F3028F25 Datasheet, PDF (678/925 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

MSTCR Access from DMAC Disabled: To prevent malfunctions, MSTCR can only be accessed
from the CPU. It can be read by the DMAC, but it cannot be written by the DMAC.
20.7 System Clock Output Disabling Function
Output of the system clock (φ) can be controlled by the PSTOP bit in MSTCRH. When the
PSTOP bit is set to 1, output of the system clock halts and the φ pin is placed in the high-
impedance state. Figure 20.3 shows the timing of the stopping and starting of system clock output.
When the PSTOP bit is cleared to 0, output of the system clock is enabled. Table 20.4 indicates
the state of the φ pin in various operating states.
MSTCRH write cycle
(PSTOP = 1)
MSTCRH write cycle
(PSTOP = 0)
T1 T2 T3
T1 T2 T3
φ pin
High impedance
Figure 20.3 Starting and Stopping of System Clock Output
Table 20.4 φ Pin State in Various Operating States
Operating State
Hardware standby
Software standby
Sleep mode
Normal operation
PSTOP = 0
High impedance
Always high
System clock output
System clock output
PSTOP = 1
High impedance
High impedance
High impedance
High impedance
Rev. 2.00, 09/03, page 646 of 890