HD64F3028F25 Datasheet, PDF (198/925 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

To use the self-refresh function, set the SRFMD bit to 1 in DRCRA. When a SLEEP instruction is
subsequently executed in order to enter software standby mode, the CAS and RAS signals are
output and the DRAM enters self-refresh mode, as shown in figure 6.30.
When the chip exits software standby mode, CAS and RAS outputs go high.
The following conditions must be observed when the self-refresh function is used:
• When burst access is selected, RAS up mode must be selected before executing a SLEEP
instruction in order to enter software standby mode. Therefore, if RAS down mode has been
selected, the RDM bit in DRCRA must be cleared to 0 and RAS up mode selected before
executing the SLEEP instruction. Select RAS down mode again after exiting software standby
mode.
• The instruction immediately following a SLEEP instruction must not be located in an area
designated as DRAM space.
The self-refresh function will not work properly unless the above conditions are observed.
φ
Address bus
CSn (RAS)
PB₄ (UCAS)
PB₅ (LCAS)
RD (WE)
RFSH
Software standby Oscillation stabilization
mode
time
High-impedance
Figure 6.30 Self-Refresh Timing (CSEL = 0)
Refresh Signal (RFSH): A refresh signal (RFSH) that transmits a refresh cycle off-chip can be
output by setting the RFSHE bit to 1 in DRCRA. RFSH output timing is shown in figures 6.28,
6.29, and 6.30.
Rev. 2.00, 09/03, page 166 of 890