HD64F3028F25 Datasheet, PDF (603/925 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

17.3 Operation
When the RAME bit is set to 1, the on-chip RAM is enabled. Accesses to addresses H'FBF20 to
H'FFF1F in modes 1, 2, and 7, and to addresses H'FFBF20 to H'FFFF1F in the H8/3028 Group in
modes 3, 4, and 5, and to addresses H'7F20 to H'FF1F in mode 6, are directed to the on-chip
RAM. In modes 1 to 5 (expanded modes), when the RAME bit is cleared to 0, the off-chip address
space is accessed. In modes 6 and 7 (single-chip mode), when the RAME bit is cleared to 0, the
on-chip RAM is not accessed: read access always results in H'FF data, and write access is ignored.
Since the on-chip RAM is connected to the CPU by an internal 16-bit data bus, it can be written
and read by word access. It can also be written and read by byte access. Byte data is accessed in
two states using the upper 8 bits of the data bus. Word data starting at an even address is accessed
in two states using all 16 bits of the data bus.
Rev. 2.00, 09/03, page 571 of 890