HD64F3028F25 Datasheet, PDF (310/925 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Pin
P81/CS3/IRQ1
Pin Functions and Selection Method
The DRAM interface settings by bits DRAS2 to DRAS0 in DRCRA, and bit
P81DDR, select the pin function as follows.
DRAM interface
settings
(1) in table below
(2) in table below
(3) in table below
P81DDR
Pin function
0
P81
input
pin
1
CS3
output
pin
0
P81
input
pin
1
P81
output
pin
—
CS3
output
pin^*
IRQ1 input pin
Note: * CS3 is output as RAS3.
DRAM interface
setting
(1)
(3) (2)
(3)
(2)
DRAS2
0
1
DRAS1
0
1
0
1
DRAS0
0
1
0
1
0
1
0
1
P80/RFSH/IRQ0 Bit RFSHE in DRCRA and bit P80DDR select the pin function as follows.
RFSHE
0
1^*
P80DDR
0
1
—
Pin function
P80 input
P80 output
RFSH output
IRQ0 input
Note: * If areas 2 to 5 are not designated as DRAM space, this bit should not be
set to 1.
Rev. 2.00, 09/03, page 278 of 890