HD64F3028F25 Datasheet, PDF (817/925 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

DTCR0B—Data Transfer Control Register 0B
• Short address mode
Bit
7
DTE
6
DTSZ
5
DTID
4
RPE
3
DTIE
Initial value
0
0
0
0
0
Read/Write R/W
R/W
R/W
R/W
R/W
H'FFF2F
2
DTS2
0
R/W
1
DTS1
0
R/W
0
DTS0
0
R/W
DMAC0
Data transfer select
Bit 2 Bit 1 Bit 0
Data Transfer Activation Source
DTS2 DTS1 DTS0
0 ^{Compare match/input capture A interrupt}
from 16-bit timer channel 0
0
0
1
Compare match/input capture A interrupt
from 16-bit timer channel 1
0 ^{Compare match/input capture A interrupt}
1
from 16-bit timer channel 2
1 A/D converter conversion end interrupt
0
0 SCI0 transmit-data-empty interrupt
1 SCI0 receive-data-full interrupt
1
1
0 Falling edge of DREQ input
1 Low level of DREQ input
Data transfer interrupt enable
0 Interrupt requested by DTE bit is disabled
1 Interrupt requested by DTE bit is enabled
Repeat enable
RPE DTIE Description
0
0
1 ^{I/O mode}
1
0 Repeat mode
1 Idle mode
Data transfer increment/decrement
0 Incremented: If DTSZ = 0, MAR is incremented by 1 after each transfer
If DTSZ = 1, MAR is incremented by 2 after each transfer
1 Decremented: If DTSZ = 0, MAR is decremented by 1 after each transfer
If DTSZ = 1, MAR is decremented by 2 after each transfer
Data transfer size
0 Byte-size transfer
1 Word-size transfer
Data transfer enable
0 Data transfer is disabled
1 Data transfer is enabled
Rev. 2.00, 09/03, page 785 of 890