HD64F3028F25 Datasheet, PDF (456/925 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Bits 5 and 4—Group 2 Compare Match Select 1 and 0 (G2CMS1, G2CMS0): These bits
select the compare match event that triggers TPC output group 2 (TP₁₁ to TP₈).
Bit 5
G2CMS1
0
1
Bit 4
G2CMS0
0
1
0
1
Description
TPC output group 2 (TP11 to TP8) is triggered by compare match in 16-bit
timer channel 0
TPC output group 2 (TP11 to TP8) is triggered by compare match in 16-bit
timer channel 1
TPC output group 2 (TP11 to TP8) is triggered by compare match in 16-bit
timer channel 2
TPC output group 2 (TP11 to TP8) is triggered by
compare match in 16-bit timer channel 2
(Initial value)
Bits 3 and 2—Group 1 Compare Match Select 1 and 0 (G1CMS1, G1CMS0): These bits
select the compare match event that triggers TPC output group 1 (TP₇ to TP₄).
Bit 3
G1CMS1
0
1
Bit 2
G1CMS0
0
1
0
1
Description
TPC output group 1 (TP7 to TP4) is triggered by compare match in 16-bit
timer channel 0
TPC output group 1 (TP7 to TP4) is triggered by compare match in 16-bit
timer channel 1
TPC output group 1 (TP7 to TP4) is triggered by compare match in 16-bit
timer channel 2
TPC output group 1 (TP7 to TP4) is triggered by
compare match in 16-bit timer channel 2
(Initial value)
Bits 1 and 0—Group 0 Compare Match Select 1 and 0 (G0CMS1, G0CMS0): These bits
select the compare match event that triggers TPC output group 0 (TP₃ to TP₀).
Bit 1
G0CMS1
0
1
Bit 0
G0CMS0
0
1
0
1
Description
TPC output group 0 (TP3 to TP0) is triggered by compare match in 16-bit
timer channel 0
TPC output group 0 (TP3 to TP0) is triggered by compare match in 16-bit
timer channel 1
TPC output group 0 (TP3 to TP0) is triggered by compare match in 16-bit
timer channel 2
TPC output group 0 (TP3 to TP0) is triggered by
compare match in 16-bit timer channel 2
(Initial value)
Rev. 2.00, 09/03, page 424 of 890